PURPOSE: To detect a pattern designated by a NRZ code from signals encoded into DMI codes with necessary minimum circuit configuration, by giving redundancy to the register circuit of a circuit for detecting pattern of false random codes with the DMI codes and detecting the pattern of the false random codes.

CONSTITUTION: A figure (c) shows a pattern detecting signal 31, to which a pattern, in which the '1' of a NRZ code continues for nine times, and a redundancy bit is added, and the pattern detecting signal 31 is stored in a register circuit 3 in advance and compared with the NRZ-coded signal 21 shown in a figure (b) by means of a comparator circuit 4. Only when both the signals 31 and 21 coincide with each other in the unit of bit, the coincidence detecting signal 41 shown in a figure (d) is outputted. The aberration decode signal of a figure (h) which is decoded under a half bit-shifted condition becomes a decode signal different from the original NRZ code and becomes to have the pattern, in which the '1' of the NRZ code continues for nine times. Since there is a possibility of regarding this aberration decode signal as the signal indicating the coincidence of a detected pattern, a redundancy bit is added as shown by the pattern detecting signal 31 of a figure (c) and coincidence of patterns is detected to prevent the mistake.