Title:
PHOTOELECTRIC INTEGRATED CIRCUIT AND HETEROJUNCTION PHOTOTRANSISTOR
Document Type and Number:
Japanese Patent JP3589390
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a photoelectric integrated circuit and a heterojunction phototransistor in which trade-off between light receiving sensitivity and operating speed can be eliminated.
SOLUTION: A photoelectric integrated circuit comprises a heterojunction bipolar transistor having first through fourth collector layers 102-105, a base layer 106 and an emitter layer 107 laminated on a substrate 101 and provided with a collector electrode 109, a base electrode 110 and an emitter electrode 111, and a photodiode(PD) having collector layers 102-105, a base layer 106 and first through fifth common semiconductor layers 102a-106a formed on the substrate 101 and provided with an n side electrode 109a and a p side electrode 110a formed simultaneously with the electrodes 109, 110. The photoelectric integrated circuit outputs a signal light 1 incident to the PD while converting into an electric signal and an inverted mesa 112 inclining inward in the thickness direction of the substrate 101 is provided the PD side end face of the substrate 101.
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Inventors:
Hiroshi Matsuoka
Hideki Fukano
Hideki Fukano
Application Number:
JP1946099A
Publication Date:
November 17, 2004
Filing Date:
January 28, 1999
Export Citation:
Assignee:
Nippon Telegraph and Telephone Corporation
International Classes:
H01L29/73; H01L21/331; H01L21/8222; H01L27/06; H01L27/14; H01L29/205; H01L29/737; H01L31/10; (IPC1-7): H01L27/14; H01L31/10
Domestic Patent References:
| JP8186240A | ||||
| JP10190042A | ||||
| JP6314813A | ||||
| JP8154079A | ||||
| JP9069648A |
Attorney, Agent or Firm:
Hiroshi Matsumoto
Toshiro Mitsuishi
Yasuyuki Tanaka
Toshiro Mitsuishi
Yasuyuki Tanaka