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Patent Searching and Data


Title:
PREVENTION SYSTEM FOR ROM ERRONEOUS INSERTION
Document Type and Number:
Japanese Patent JPH076097
Kind Code:
A
Abstract:

PURPOSE: To prevent the runaway of a CPU even if a ROM is fitted at an erroneous position of a device which has plural replaceable ROMs.

CONSTITUTION: A bootstrap loader is stored in an address FFFF0 which is executed first after a ROM 1 for activation is released from being reset, and an IPL routine is stored in the address designation by the bootstrap loader; and an ID check routine which checks erroneous fitting of ROM 2-ROM (n) is stored successively to the IPL routine. Bootstrap loader is stored in the locations of the ROM 2-ROM (n) corresponding to the address of the ROM 1 where the bootstrap loader is stored and error process routines which inform to the effect that the ROMs are fitted at erroneous positions are stored in the addresses designated by the bootstrap loaders.


Inventors:
KATO SETSU
Application Number:
JP14637193A
Publication Date:
January 10, 1995
Filing Date:
June 17, 1993
Export Citation:
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Assignee:
NTT DATA TSUSHIN KK
International Classes:
G06F12/16; (IPC1-7): G06F12/16
Attorney, Agent or Firm:
Yoshiyuki Osuge