Title:
PRODUCTION OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5467783
Kind Code:
A
Abstract:
PURPOSE: To form a semiconductor memory with MOS structure by forming trap levels in the specified position in insulation film through ion implantation.
CONSTITUTION: Source 2 and drain 3a diffused regions are formed in monocrystalline silicon 1 and with silicon dioxide 4 as a gate, a mask 5 is formed through oxidation. Next, neutral atom ions 6 such as Ar ions are ion-implanted to produce ion-implantation damage defects 7 in the silicon dioxide. Next, at the time of annealing the annealing temperature is suitably selected, whereby the number and positions of trap levels may be controlled more accurately than those before annealing.
Inventors:
ENDOU SHIGEKAZU
Application Number:
JP13435877A
Publication Date:
May 31, 1979
Filing Date:
November 09, 1977
Export Citation:
Assignee:
SEIKO INSTR & ELECTRONICS
International Classes:
H01L21/265; H01L21/8247; H01L29/41; H01L29/788; H01L29/792; (IPC1-7): G11C11/40; H01L21/265; H01L29/40; H01L29/76