Title:
PULSE NOISE DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JP3108220
Kind Code:
B2
Abstract:
PURPOSE: To prevent the deterioration in the detection sensitivity due to pulse noise by forcibly turning off a detection means for continuous noise detection for a prescribed time after detection of pulse noise or disconnecting the detection means from a rectifier circuit so as to keep a detection output to be in the same level.
CONSTITUTION: When a transistor(TR) Tr6 is turned on a base of a Tr1 connects to ground to turn off the Tr1. The Tr6 is turned on when its base receives a control signal from a gate control circuit 32. Since the circuit 32 generates a control signal for a prescribed time after the Tr2 detects pulse noise, When the Tr6 is turned off, a rectified output of a rectifier circuit including the pulse noise is not an object of smoothing by a capacitor C1. Thus, an AGC voltage is kept to a value nearly equal to that before generation of the control signal, and even when the repetitive frequency of the pulse noise is high, the increase in the AGC voltage due to unswitching, and then the deterioration in the pulse noise detection sensitivity due to the Tr2 is not caused.
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Inventors:
Hirohisa Suzuki
Application Number:
JP26102792A
Publication Date:
November 13, 2000
Filing Date:
September 30, 1992
Export Citation:
Assignee:
Sanyo Electric Co., Ltd.
International Classes:
H04B1/10; (IPC1-7): H04B1/10
Domestic Patent References:
| JP1227528A | ||||
| JP6112853A |
Attorney, Agent or Firm:
Kenji Yoshida (2 outside)