Title:
PULSE WIDTH MODULATION CIRCUIT
Document Type and Number:
Japanese Patent JP3124179
Kind Code:
B2
Abstract:
PURPOSE: To obtain a pulse width modulation circuit in which radiation is effectively suppressed with a simple configuration while securing the S/N and a broad dynamic range.
CONSTITUTION: The pulse width modulation circuit is provided with an integration circuit 10 integrating an input signal fed to an input terminal with respect to time, a comparator circuit 20 provided to an output of the circuit 10 and having a hysteresis characteristic, a feedback means 30 leading an output of the comparator circuit to an input of the integration circuit, and an amplitude modulation circuit 40 provided in a loop including the integration circuit and the comparator circuit and executing amplitude modulation so that an output of the comparator circuit is frequency-modulated. The output of the comparator circuit may be fed back to the integration circuit via the amplitude modulation circuit or the output of the integration circuit after it is amplitude-modulated by the amplitude modulation circuit may be given to the comparator circuit. A dither signal is given to the amplitude modulation circuit or a signal used to prevent decrease in the frequency of the obtained pulse width modulation signal.
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Inventors:
Hiroyuki Haga
Osuka
Osuka
Application Number:
JP4745394A
Publication Date:
January 15, 2001
Filing Date:
March 17, 1994
Export Citation:
Assignee:
Toshiba Corporation
Toshiba Digital Media Engineering Co., Ltd.
Toshiba Digital Media Engineering Co., Ltd.
International Classes:
H03F3/217; H03K7/08; (IPC1-7): H03K7/08; H03F3/217
Attorney, Agent or Firm:
Kazuo Sato (3 others)