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Patent Searching and Data


Title:
RUSH CURRENT PREVENTING CIRCUIT IN MULTIPLEX TRANSMISSION
Document Type and Number:
Japanese Patent JPS6398299
Kind Code:
A
Abstract:

PURPOSE: To prevent a rush current occurring at the first of a transmitting pulse current, to eliminate a dummy signal and to shorten a time necessary to polling by providing a rush current preventing means to prevent a rush current to a load at a central control unit when a transmitting pulse current is sent to the load.

CONSTITUTION: A capacitor C2 connected in parallel to the Zener diode ZD1 of a conventional constitution, and the discharging circuit of a transistor TR4 and resistances R5 and R6 to discharge the charge of the capacitor C2 are provided. When a transmitting pulse is impressed to an input terminal A, transistor TR3 and TR1 are turned on, a current is conducted through a resistance R2 to the capacitor C2 and the capacitor C2 is charged. In accordance with the charging curve V2 of the capacitor C2, the voltage is outputted from a transistor TR2, and the impressed voltage to a load 3 is adjusted. In short, until the capacitor of the load 3 is charged, the impressed voltage to the load 3 is lowered in accordance with the charging curve of the capacitor C2, and the voltage occurring at both edges of a resistance R4 at the time of the first rush of the transmitting pulse current can be adjusted, in short, lowered.


Inventors:
KIKUCHI MASAHIRO
FUJIKI HITOSHI
Application Number:
JP24442186A
Publication Date:
April 28, 1988
Filing Date:
October 15, 1986
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC WORKS LTD
International Classes:
H04L5/22; H04J3/00; H04Q9/14; (IPC1-7): H04J3/00; H04Q9/14
Attorney, Agent or Firm:
Ishida Choshichi