To provide a semiconductor device capable of using information of a delay lock state by detecting the delay lock state of a delay locked loop having hierarchical delay lines.

This semiconductor device is provided with a delay locked loop block in a hierarchical delay line structure including a coarse delay line and a fine delay line; a phase state storage means for storing a phase state of a comparison target clock at a time point of coarse delay control end in response to a phase comparison signal and a coarse delay control end signal outputted from the delay locked loop block; and a delay lock state detecting means for generating a delay lock signal to be asserted at the time point by detecting the transition time point of the phase comparison signal associated with fine delay control in response to the phase comparison signal, the coarse delay control end signal and a phase state signal outputted from the phase state storage means.