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Title:
SEMICONDUCTOR DEVICE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JP3891678
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To provide a highly integrated semiconductor device which has a reduced area as compared with the conventional one and also provide a method for manufacturing such a device.
SOLUTION: This semiconductor device is composed of a multilayer board 110, a first semiconductor chip 111, and a second semiconductor chip 112. The first semiconductor chip 111 has, on one of facing side faces, first pad electrodes 124 flip-chip bonded with the first semiconductor chip 11 and second pad electrodes 125 electrically connected with second electrodes 136 of the second semiconductor chip 112, and has third pad electrodes 126 electrically connected with the first and the second pad electrodes 124, 125 on the other side face. Because of this structure, the conventional inner leads are not necessary, and thereby the area of the entire semiconductor device can be reduced. Furthermore, by laying the second semiconductor chip 112 on top of the first semiconductor chip 111, the degree of integration can be increased.


Inventors:
Toshiaki Sugimura
Nishida alone
Application Number:
JP6004098A
Publication Date:
March 14, 2007
Filing Date:
March 11, 1998
Export Citation:
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Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H01L21/60; H01L25/065; H01L25/07; H01L25/18; (IPC1-7): H01L21/60; H01L21/60
Domestic Patent References:
JP7326710A
JP60048254U
JP8340081A
JP61058248A
JP5055303A
JP11204720A
JP9260441A
JP8107167A
JP11261044A
Attorney, Agent or Firm:
Aoyama Aoi
Mitsuo Wada