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Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2005236233
Kind Code:
A
Abstract:

To control variation of characteristics between lots or wafers in a field effect transistor.

The semiconductor device manufacturing method includes (A) a step to form a gate electrode 13 on a substrate 11, (B) a step to detect the three dimensional shape of the gate electrode 13, and (C) a step to form a diffusion area 32 in a substrate 11 by implanting a impurity ion 31. In the (C) forming step, the condition for implanting the impurity ion 31 is controlled based on the detected three dimensional shape. Specifically, in the pocket implantation process, the energy of the impurity ion 31 to be implanted is controlled based on an angle θ between the side of the gate electrode 13 and the substrate 11.


Inventors:
MANSEI AKIRA
Application Number:
JP2004047059A
Publication Date:
September 02, 2005
Filing Date:
February 23, 2004
Export Citation:
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Assignee:
NEC ELECTRONICS CORP
International Classes:
H01L21/265; H01L21/336; H01L29/78; (IPC1-7): H01L21/336; H01L21/265; H01L29/78
Domestic Patent References:
JP2002305298A2002-10-18
JP2001024186A2001-01-26
JPH11220124A1999-08-10
JP2000357792A2000-12-26
JP2001007330A2001-01-12
Foreign References:
US20020132377A12002-09-19
Attorney, Agent or Firm:
Minoru Kudo