To provide a semiconductor device which can generate a plurality of memories constituted of arbitrary word bits from a single memory cell array by only modifying a wiring layer.
A semiconductor substrate 10 includes a memory cell array 11 having a plurality of memory cells arranged in rows and columns at least except for a word line, a sense amplifier 12 for reading data of selected one of the memory cells, a write buffer 13 for writing the data in selected one of the memory cells, an input/output circuit 14 for receiving the write or read data, a plurality of word line drivers 15-1 to 15-4 corresponding in number to at least the number of divisions of the memory cell array in a row direction, and a plurality of address decoders 16-1 to 16-4 corresponding in number to the number of the word line drivers. The plurality of word line drivers 15-1 to 15-4 are connected to the plurality of memory cells arranged in the row direction of the memory cell array by a plurality of word lines.
TANAKA YUTAKA
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Takashi Mine
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto
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