Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2019046282
Kind Code:
A
Abstract:
To provide a semiconductor device with small power consumption.SOLUTION: A semiconductor device has a memory cell and an offset correction circuit. The memory cell has a function of generating a current corresponding to first and second data. The offset correction circuit has an operational amplifier, first and second resistive elements, a capacitive element, and a buffer. One of a non-inverted input terminal and an inverted input terminal of the operational amplifier is electrically connected to one terminal of the first resistive element, and another one of the non-inverted input terminal and the inverted input terminal of the operational amplifier is electrically connected to a terminal of one of an output terminal and the capacitive element of the operational amplifier via the second resistive element. Moreover, another terminal of the first capacitive element is electrically connected to the buffer. A potential corresponding to the aforementioned current is supplied to the non-inverted input terminal and the inverted input terminal of the operational amplifier. The buffer has a function of outputting a signal of a potential corresponding to a product of the first data and the second data.SELECTED DRAWING: Figure 5
Inventors:
INOUE HIROKI
HARADA SHINTARO
HARADA SHINTARO
Application Number:
JP2017170086A
Publication Date:
March 22, 2019
Filing Date:
September 05, 2017
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB CO LTD
International Classes:
G06G7/60; G06G7/122; G06N3/063