Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2021064377
Kind Code:
A
Abstract:
To reduce the circuit scale of a semiconductor device that can perform a calculation process for analog data.SOLUTION: In a semiconductor device 10, a memory cell MC[i, j] includes a function of generating first current according to first analog data, and a function of generating second current according to the first analog data and second analog data. A reference memory cell MCR[i] includes a function of generating reference current according to reference data. When the first current is smaller than the reference current, a first circuit generates third current according to a difference between the first current and the reference current, and holds the third current. When the first current is larger than the reference current, a second circuit generates fourth current according to the difference between the first current and the reference current, and holds the fourth current. The first circuit or the second circuit 14 generates fifth current according to third analog data on the basis of the second current and the third current or the fourth current.SELECTED DRAWING: Figure 1
Inventors:
KUROKAWA YOSHIMOTO
Application Number:
JP2020201540A
Publication Date:
April 22, 2021
Filing Date:
December 04, 2020
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB CO LTD
International Classes:
G06G7/12; H01L21/8234; H01L21/8242; H01L27/06; H01L27/088; H01L27/108; H01L29/786
Domestic Patent References:
| JP2015165558A | 2015-09-17 | |||
| JPH06274661A | 1994-09-30 | |||
| JPH0467259A | 1992-03-03 | |||
| JP2012150875A | 2012-08-09 |
Foreign References:
| US20050122238A1 | 2005-06-09 |