Title:
半導体装置、及び電子機器
Document Type and Number:
Japanese Patent JP7364586
Kind Code:
B2
Abstract:
A semiconductor device that can perform product-sum operation with low power consumption is provided. The semiconductor device includes first and second circuits; the first circuit includes a first holding node and the second circuit includes a second holding node. The first circuit is electrically connected to first and second input wirings and first and second wirings, the second circuit is electrically connected to the first and second input wirings and the first and second wirings, and the first and second circuits each have a function of holding first and second potentials corresponding to first data at the first and second holding nodes. When a potential corresponding to second data is input to each of the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring and the second circuit outputs a current to the other of the first wiring and the second wiring. The currents output from the first and second circuits to the first wiring or the second wiring are determined in accordance with the first and second potentials held at the first and second holding nodes.
Inventors:
Hajime Kimura
Yoshimoto Kurokawa
Yoshimoto Kurokawa
Application Number:
JP2020552172A
Publication Date:
October 18, 2023
Filing Date:
October 07, 2019
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G06G7/60; G06G7/16; G06N3/063; H01L21/336; H01L21/8234; H01L27/06; H01L27/088; H01L29/786; H01L29/788; H01L29/792; H10B12/00; H10B41/70; H10B63/10; H10B80/00; H10K71/80; H10N70/20
Domestic Patent References:
| JP2018109968A | ||||
| JP2059956A |