Title:
半導体装置及びその製造方法
Document Type and Number:
Japanese Patent JP4949719
Kind Code:
B2
Abstract:
A method of producing a semiconductor device includes the steps of forming a protrusion electrode on a semiconductor chip; and sealing the protrusion electrode and a semiconductor substrate with a resin layer. The method further includes the steps of polishing the resin layer until an upper surface of the protrusion electrode is exposed; polishing the exposed upper surface of the protrusion electrode; and forming a solder terminal on the polished upper surface of the protrusion electrode.
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Inventors:
Yasuo Tanaka
Application Number:
JP2006106237A
Publication Date:
June 13, 2012
Filing Date:
April 07, 2006
Export Citation:
Assignee:
LAPIS Semiconductor Co., Ltd.
International Classes:
H01L23/12
Domestic Patent References:
| JP2001168128A | ||||
| JP2004241660A | ||||
| JP2003234430A |
Attorney, Agent or Firm:
Atsushi Nakajima
Kato Kazunori
Hiroshi Fukuda
Kato Kazunori
Hiroshi Fukuda