To provide a semiconductor integrated circuit device which suppresses the short channel effect of a MISFET and improves the current driving capacity, and its manufacture.
A buried layer 23 of the same conductivity as the channel region made in the p-type well 2 on the main surface of a semiconductor substrate 1 and besides higher in impurity concentration than the channel region is made. The depth of the buried layer 23 is made 0.04μm-0.1μm from the shallower region than the deepest section of a n+-type semiconductor region 14 which forms a source and a drain, preferably, its roughly center, to be concrete, from the interface between a gate insulating film 7 and the main face of the semiconductor substrate, and the width of the buried layer 23 is made narrower than the distance equivalent to the depth of the deepest section of the n+-type semiconductor region 14, to be concrete, 0.04μm or under.
OKUYAMA KOSUKE
KUBOTA KATSUHIKO
HITACHI MICROCOMPUTER SYST
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