Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH09246538
Kind Code:
A
Abstract:
To improve the performance and the reliability of a semiconductor integrated circuit device which has a fine MIS transistor.
In the p well 2p of a semiconductor substrate 1, a lightly doped area lower in impurity concentration than other area of the p well 2p is made between the lower part of the channel region and the lower part of the p well 2p. The lightly doped area is made by introducing reverse conductivity type of impurities from the conductivity type of the p well 2p so that the conductivity type of the p well 2p may not be inverted.
Inventors:
TSUNENO KATSUMI
ISHII MASAHIRO
KUNITOMO HISAAKI
AOYAMA JINKO
NAKAMURA TAKAHIDE
SATO HISAKO
MASUDA HIROO
ISHII MASAHIRO
KUNITOMO HISAAKI
AOYAMA JINKO
NAKAMURA TAKAHIDE
SATO HISAKO
MASUDA HIROO
Application Number:
JP4972896A
Publication Date:
September 19, 1997
Filing Date:
March 07, 1996
Export Citation:
Assignee:
HITACHI LTD
International Classes:
H01L21/768; H01L21/8234; H01L27/06; H01L29/78; (IPC1-7): H01L29/78; H01L21/768; H01L21/8234; H01L27/06
Attorney, Agent or Firm:
Yamato Tsutsui