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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JP3516296
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To suppress power consumption at off-time, without spoiling fast operation using a low-threshold transistor (TR).
SOLUTION: This semiconductor integrated circuit composed of a 1st TR with a 1st threshold which constitutes the semiconductor integrated circuit including a MOSFET is characterized in that at least one of 1st transistors TRL which is present between the power source and ground, the power source or ground and the output circuit to the semiconductor integrated circuit, or output circuits to the semiconductor integrated circuit and forms a current path is replaced with a transistor part, including a 2nd transistor TRH with a 2nd threshold higher than the 1st threshold.


Inventors:
Nagasawa, Kazuhiro
Imai, Shigenori
Application Number:
JP16607299A
Publication Date:
April 05, 2004
Filing Date:
June 11, 1999
Export Citation:
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Assignee:
SHARP CORP
International Classes:
H01L21/822; H01L27/04; H03K19/0944; H03K19/0948; (IPC1-7): H03K19/0944; H01L21/822; H01L27/04; H03K19/0948
Attorney, Agent or Firm:
山本 秀策