SEMICONDUCTOR INTEGRATED CIRCUIT

Title:

SEMICONDUCTOR INTEGRATED CIRCUIT

Document Type and Number:

Japanese Patent JP2964799

Kind Code:

B2

Abstract:

PURPOSE: To obtain a scan pass test circuit reduced in erroneous operation in a semiconductor integrated circuit.
CONSTITUTION: A signal is inputted to a plurality of flip-flops 10-1, 10-2, 10-3 used in a scan pass test through selector circuits 9-1,9-2,9-3 so that the clock signals of the flip-flops always become the signals of the clock signals of the flip-flops of the inverted previous stage to increase an operation margin.

More Like This:

JP2018036235	SUBSTRATE CHECKUP DEVICE, SUBSTRATE PROCESSING DEVICE, SUBSTRATE CHECKUP METHOD, AND SUBSTRATE PROCESSING METHOD
JP2642946	[Title of Invention] Probe device
JP2002286442	MEASUREMENT TECHNOLOGY FOR VERY THIN FILM OXIDE

Inventors:

NUKADA YASUAKI

Application Number:

JP28240792A

Publication Date:

October 18, 1999

Filing Date:

September 28, 1992

Export Citation:

Click for automatic bibliography generation Help

Assignee:

NIPPON DENKI KK

International Classes:

H01L21/66; G01R31/28; (IPC1-7): G01R31/28; H01L21/66

Domestic Patent References:

JP346821A
JP1299479A
JP63263480A

Attorney, Agent or Firm:

Sugano Naka

Previous Patent: CAPACITOR ARRAY TYPE D/A CONVERSION CIRCUIT

Next Patent: APPARATUS FOR MEASURING THICKNESS OF WET PAINT FILM