Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP3642079
Kind Code:
B2
Abstract:
PURPOSE: To reduce the power consumption by providing an electrode to be electrically floated and plural input electrodes provided through electrodes and capacitors and providing a means for practically deciding potential difference corresponding to the potentials applied to the input electrodes.
CONSTITUTION: At the time of a precharge voltage VPR, concerning the potential of a node 107, the potential difference is generated between differential input terminals, namely, between nodes 106 and 107. Then, the nodes 106 and 107 are disconnected from a floating gate or the precharge voltage and mutually equal and minimum capacities exist at both the nodes. Next, a switch 111 is driven by a clock signal &phiv EV to be gradually changed from "'0' to '1' and the potential of a node 110 is gradually lowered toward a ground voltage 0V. Thus, the potential difference between the differential input terminals, namely, between the nodes 106 and 107 is amplified. Since a switch 109 is turned off during this term, a current to pass through an inverter does not flow so that the power consumption can be suppressed.
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Inventors:
Koji Kotani
Nao Shibata
Tadahiro Ohmi
Nao Shibata
Tadahiro Ohmi
Application Number:
JP2444195A
Publication Date:
April 27, 2005
Filing Date:
February 13, 1995
Export Citation:
Assignee:
Nao Shibata
Tadahiro Ohmi
UCT Co., Ltd.
I & F Co., Ltd.
Tadahiro Ohmi
UCT Co., Ltd.
I & F Co., Ltd.
International Classes:
G06G7/60; G06F15/18; G06N3/06; G06N3/063; G11C11/54; H03K3/356; H03K19/20; (IPC1-7): G06G7/60; G06N3/06; G11C11/54; H03K19/20
Domestic Patent References:
| JP6125049A | ||||
| JP6252744A | ||||
| JP7161942A | ||||
| JP7226912A |
Attorney, Agent or Firm:
Hisao Fukumori