SEMICONDUCTOR AND MANUFACTURING METHOD THEREOF

Title:

SEMICONDUCTOR AND MANUFACTURING METHOD THEREOF

Document Type and Number:

Japanese Patent JP2003069049

Kind Code:

A

Abstract:

To provide a semiconductor device that is improved so that high- performance element characteristics can be achieved in simple manufacturing process.

A metal electrode 12 is provided on a semiconductor region 2. A resistance layer 3 whose thickness and resistivity are less than 10 nm and 100 Ω/cm or more, respectively, is provided on the semiconductor region 2 and at the same time at least around a metal electrode 12. The semiconductor region 2 that becomes an operation region is covered with the resistance layer 3 of a highly pure epitaxial growth layer, thus preventing generation of defects and levels, and hence achieving apparatus characteristics that are estimated according to the semiconductor region 2.

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Inventors:

OTSUKA KENICHI
TARUI YOICHIRO
IMAIZUMI MASAYUKI
SUGIMOTO HIROSHI

Application Number:

JP2001252529A

Publication Date:

March 07, 2003

Filing Date:

August 23, 2001

Export Citation:

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