Title:
SEMICONDUCTOR MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2012142627
Kind Code:
A
Abstract:
To provide a semiconductor device and a semiconductor manufacturing method which can achieve excellent conjunction between semiconductor devices or with a substrate and have excellent manufacturing stability.
A semiconductor device 1 comprises: a semiconductor substrate 11; and a conductor post part 121 protruding from the semiconductor substrate 11. The conductor post part 121 is provided on the semiconductor substrate 11 without forming a depression hollowing in a direction crossing a protruding direction of the conductor post part 121 on an outer face extending from a tip to a base on the semiconductor substrate 11 side.
Inventors:
KURITA YOICHIRO
Application Number:
JP2012100693A
Publication Date:
July 26, 2012
Filing Date:
April 26, 2012
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
H01L21/60; H01L25/065; H01L25/07; H01L25/18
Domestic Patent References:
JP2005277059A | 2005-10-06 | |||
JPH07283220A | 1995-10-27 | |||
JPH1070127A | 1998-03-10 |
Attorney, Agent or Firm:
Shinji Hayami
Satoshi Amagi
Satoshi Amagi
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