To resolve the problem of memory cell region size increase and large increase of memory cell array region, in the case that the size of the memory cell region increases in the row direction, caused by the influence of the connection hole for connecting a first layer bit line and a second layer bit line in a semiconductor memory device constituted by the bit lines of two layers.

A dummy cell region, which does not electrically perform memory cell operation, is installed, adjoining the memory cell region having the connection hole, or the connection hole is arranged in the dummy cell region.