Title:
SEMICONDUCTOR PACKAGE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JP3234062
Kind Code:
B2
Abstract:
PURPOSE: To inexpensively obtain a highly reliable semiconductor thin package by providing a resin substrate equipped with a wiring circuit, electronic components including an IC chip mounted on one main surface of the substrate in a face-down state, the molding resin layer of the components, etc.
CONSTITUTION: A semiconductor package is provided with a resin substrate 7 equipped with a wiring circuit, at least one IC chip mounted on one main surface of the substrate 7 in a face-down state, and a molding resin layer 11 which molds the main surface of the substrate 7 including the components 8 mounted on the main surface. A module is assembled by, for example, aligning and arranging the components 8 including the IC chip on the main surface of the substrate 7 and fixing and connecting connection terminals 7a and 8a aligned on the surface of the substrate 7 in correspondence to the components 8. Then the assembled module is put in a mold and the electronic components mounting surface of the module is molded by press-injecting a molding resin into the mold.
Inventors:
Hideo Aoki
Hiroshi Iwasaki
Hiroshi Iwasaki
Application Number:
JP21750393A
Publication Date:
December 04, 2001
Filing Date:
September 01, 1993
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L21/56; G06K19/077; H01L21/60; H01L23/28; (IPC1-7): H01L21/56; H01L21/60; H01L23/28
Domestic Patent References:
| JP2101753A | ||||
| JP457644A |
Attorney, Agent or Firm:
Saichi Suyama