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Patent Searching and Data


Title:
SEMICONDUCTOR RESISTANCE DEVICE
Document Type and Number:
Japanese Patent JPS5698856
Kind Code:
A
Abstract:

PURPOSE: To control with high precision the value of pinch resistance, by making use of the arising diffusion from the buried regions just below the base region, in the pinch resistance that makes use of the base emitter diffusions.

CONSTITUTION: On the p- type Si substrate, two n+ type buried regions 6' are diffusion-formed. On the whole region including these, the n- type layer 5 is epitaxially grown. The layer 5 is separated by the p+ type region 9 reaching the substrate 4 into the island layers each including the region 6. In one of the island layers 5, the p type injector region 10 of the I2L side and the p type region 11 each reaching the region 6' are diffusion-formed. Simultaneously in the other island region 5, the p type base region 12 of the pinch resistance side reaching the region 6' is diffusion-formed. In the region 11, the n+ collector region 13 and the neighboring n+ type emitter take-out region 14 are diffusion-formed. Simultaneously in the region 12, the n+ type collector region meant for pinch resistance is diffusion- formed. Thus the completed pinch resistance region 15 makes use of the arising diffusion from the region 6' and the required value of resistance can be obtained.


Inventors:
HAIJIMA MIKIO
Application Number:
JP132180A
Publication Date:
August 08, 1981
Filing Date:
January 11, 1980
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L27/04; H01L21/331; H01L21/822; H01L21/8222; H01L27/02; H01L27/06; H01L29/73; (IPC1-7): H01L27/04; H01L27/06; H01L29/72