To reduce the number of pads or eliminate enhancing of an accuracy of bonding even if the number of lead pins is increased by disposing a plurality of rows of bonding pads near a center of a circuit forming surface of a semiconductor chip in X and Y directions, and wire bonding the pins right side left with respect to a standard disposition.

If a lead pin disposition is a standard, inner leads 45 are respectively electrically connected to a semiconductor memory device via bonding wires 47. If lead pins 1 to 44 are disposed right side left to a standard disposition, the leads 45 are respectively electrically connected to the storage device via the wires 47. That is, bonding pads 46 of the storage device are respectively electrically connected to the wires 47 so that lead pins 1 to 22 of (a) become lead pins 23 to 44 of (b). Semiconductor chips conducted with the pads of at least the same number have the same functions.