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Title:
SEMICONDUCTOR TESTING MACHINE
Document Type and Number:
Japanese Patent JP2003121503
Kind Code:
A
Abstract:

To monitor a current flowing to a device to be measured, even in tests which are other than a test for measuring current consumption.

A specific value detection circuit 20 detects maximum value, minimum value and an average value by each predetermined period, while a multiplexer 30 outputs a sample value, the maximum value, the minimum value and the average value at every predetermined period. The memory 42 of a recording circuit 40 collectively stores the sample value, the maximum value, the minimum value and the average value by each predetermined period outputted from an analogue/digital converter circuit 41 and the data showing an operation state outputted from an output control circuit 14, in a first-in first-out system. A recording control circuit 50 stops renewal of the memory content of the memory, at the stoppage of the test program of the semiconductor testing machine and at operation of the output control circuit 14.


Inventors:
INOUE FUMIHITO
KUTSUNO TAKAO
YAMAHA TSUNEO
IKEDA HIROSHI
Application Number:
JP2001315934A
Publication Date:
April 23, 2003
Filing Date:
October 12, 2001
Export Citation:
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Assignee:
HITACHI ELECTR ENG
International Classes:
G01R31/28; G01R31/316; G01R31/319; H01L21/822; H01L27/04; G01R31/26; (IPC1-7): G01R31/28; G01R31/26; G01R31/316; G01R31/319; H01L21/822; H01L27/04
Attorney, Agent or Firm:
Kozo Takahashi