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Title:
SEMICONDUCTOR WAFER EXPOSURE APPARATUS AND METHOD
Document Type and Number:
Japanese Patent JP2009182323
Kind Code:
A
Abstract:

To provide semiconductor wafer exposure apparatus and method for improving lithography performance.

Semiconductor wafer exposure apparatus includes a plurality of lenses 110 for illuminating light on a semiconductor wafer, a leveling sensor 122 for measuring a topography of the semiconductor wafer to generate data according to the topography, an analyzer 112 for defining an aberration induced on a focal plane by receiving data from the leveling sensor, a controller 114 for inducing the aberration by regulating at least a lens in a plurality of lenses.


Inventors:
EMA TATSUHIKO
MOTOI TAKASHI
Application Number:
JP2008328710A
Publication Date:
August 13, 2009
Filing Date:
December 24, 2008
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L21/027
Domestic Patent References:
JP2006352112A2006-12-28
JPWO0017916A1
JP2002246309A2002-08-30
Attorney, Agent or Firm:
Takehiko Suzue
Kurata Masatoshi
Satoshi Kono
Makoto Nakamura
Yoshihiro Fukuhara
Takashi Mine
Toshio Shirane
Sadao Muramatsu
Nobuhisa Nogawa
Kocho Chojiro
Naoki Kono
Katsu Sunagawa
Tetsuya Kazama
Katsumura Hiro
Shoji Kawai
Tatsushi Sato
Takashi Okada
Mihoko Horiuchi
Takenori Masanori
Takuzo Ichihara
Yamashita Gen