PURPOSE: To prevent erroneous counting of a shift clock by keeping the clock level for a prescribed duration in response to an asynchronously issued stop request signal.

CONSTITUTION: When stop is requested from an external electronic device 106, this device 106 detects the state of an external terminal 105 and turns on an n-ch transistor TR 104 to pull down the external terminal 105. The state of the external terminal 105 is inputted to a flip flop 109 through a noise eliminating circuit 108; and if the external terminal 105 is in the low level though an internal shift clock is in the high level, the flip flop 109 is reset to pull down the n-ch TR 104. The flip flop 109 is set synchronously with the falling edge of the internal shift clock 103. Consequently, the clock is outputted only when the external terminal 105 is switched from the low level to the high level synchronously with the rising edge of the internal shift clock 103.