To prevent the generation of the non-continuity of phase control characteristics for second cycle signals even in the case that a cycle for first cycle signals is obtained with an error at the time of obtaining the second cycle signals in the relation of being a delay phase, the same phase or an advance phase to the first cycle signals.

This circuit is provided with a first counter 11 for counting first time from respective reference time points in the first cycle signals, a second counter 12 for counting second time from the point of time of count output signals obtained from the first counter 11 and a signal formation part 13 for forming the second cycle signals for which the point of time of the count output signals obtained from the second counter 12 are the respective reference time points. In this case, the first time is selected to be shorter than the time obtained by subtracting the time corresponding to the maximum phase advance to the reference time point in the first cycle signals of the reference time point in the second cycle signals from the cycle of the first cycle signals.