To know the frequency difference regardless of two clock phases by performing the comparison of frequency regardless of the relation between two clock phases and setting the output time of two detection signals in response to the frequency difference between two clocks.
The reference clock of a 1st clock is supplied to a terminal 10, and the comparison object clock of a 2nd clock is supplied to a terminal 14. A 1st count means 12 is reset at 0 and supplies an (n) detection signal to a reset means 18 when the count value of the reference clock is set at (n) and also supplies an (n+a) detection signal to a 1st holding means 20 when the count value of the reference signal is set at (n+a). A 2nd count means 16 is reset at 0 and supplies an (n) detection signal to the means 18 when the clock count value is set at (n) and also supplies an (n+b) detection signal to a 2nd holding means 22 when the clock count value is set at (n+b).
KIKUCHI AKIRA
SAKAI TOSHIYUKI
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