PURPOSE: To extend an access time and to stabilize the operation by finding a leading frame by virtually shifting data by shifting the address.

CONSTITUTION: In a memory 7, first through fourth areas 1∼4 to store signals in the unit of equi-frame quantity are provided. Signals in respective channels are sequentially written in the unit of one-frame quantity repeatedly in the respective first through the fourth areas 1∼4 in this order by varying the higher- order two bits of an address signal outputted from an address generator 5. At a time when data is being written in the i-th (provided i=1∼4 where i+3≤4) area, in case the frame bits detected by a three multi-detection part 6 come in the order first, second, third frames, the higher-order two bits of an address signal outputted from the adress generator 5 are varies, and signals in signals channels are read out from the (i+2)-th area, (i+3)-th area, and the i-th area.