Title:
SIMULATING CIRCUIT FOR THYRISTOR
Document Type and Number:
Japanese Patent JP3333854
Kind Code:
B2
Abstract:
PURPOSE: To improve the simulating circuit for a thyristor used for an analog simulator.
CONSTITUTION: A simulating circuit 20 comprises diode-containing N-MOSFETs 21, 22, a differential amplifier 23, a comparator 24, inverters 25, 26, an OR element 27, and a delay flip-flop 28. When the voltage of the output of the amplifier 23 is negative with the intermediate connecting point between the element 27 and the MOSFET 22 as a reference potential, the MOSFET 22 is conducted. When the voltage of the output of the amplifier 23 is positive by turning ON, OFF the MOSFET 21 based on the high or low level of the output of the flip-flop 28 input to the element 27 at this time, the MOSFET 22 is non-conducted.
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Inventors:
Koshi Nakazawa
Application Number:
JP6023695A
Publication Date:
October 15, 2002
Filing Date:
March 20, 1995
Export Citation:
Assignee:
Fuji Electric Co., Ltd.
International Classes:
G01R31/00; G06G7/12; H02J3/00; (IPC1-7): G06G7/12
Domestic Patent References:
| JP5190641A |
Attorney, Agent or Firm:
Masaharu Shinobe
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