Title:
SINGLE OPERATION DETECTOR
Document Type and Number:
Japanese Patent JP3403752
Kind Code:
B2
Abstract:
PURPOSE: To detect single operation positively with high sensitivity even in the case of power unbalance by detecting the single operation based on the logical product of an output from a first bus stop detection circuit or outputs from first and second phase difference detection circuits and an output from a second bus stop detection circuit or outputs from third and fourth phase difference detection circuits.
CONSTITUTION: When an undervoltage relay UVR 1 provided with a voltage (a) from #1 bus Bus functions, a #1 bus stop signal is outputted from an AND circuit A, through an operation confirming timer T3 on condition that a relay UVR 3 provided with a voltage C does not function. When phase difference detection relays SYR 1, 2 function, slow and abrupt frequency variation signals are outputted from circuits A5, A7 through timers T1, T2 on condition that an OR circuit OR7 produces no output. Furthermore, signals representative of no-linkage with the bus side are outputted from circuits OR9, OR10 when any one of the timers T1-T3 produces an output and an angle string signal is outputted from a circuit A, when all timers produce outputs thus tripping a circuit breaker B03CB.
Inventors:
Takafumi Maeda
Yoshihiro Kawasaki
Toshiro Fujimoto
Yoshihiro Kawasaki
Toshiro Fujimoto
Application Number:
JP9108493A
Publication Date:
May 06, 2003
Filing Date:
April 19, 1993
Export Citation:
Assignee:
THE TOKYO ELECTRIC POWER COMPANY,INCORPORATED
KABUSHIKI KAISHA MEIDENSHA
KABUSHIKI KAISHA MEIDENSHA
International Classes:
H02H7/22; H02J3/38; (IPC1-7): H02J3/38; H02H7/22
Domestic Patent References:
| JP515067A | ||||
| JP1185141A | ||||
| JP5771215A |
Attorney, Agent or Firm:
Fujiya Shiga (1 person outside)
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