SKEW CORRECTION DEVICE

Japanese Patent JP3512151

B2

PROBLEM TO BE SOLVED: To correct a skew between clock signals and data signals at all times.
SOLUTION: This device is provided with a transition detector 10 for supplying pulse signals at the time of detecting the transition of input data signals, a variable delay line 20 for generating first delay data signals for which the input data signals are delayed for a variable delay amount, a fixed delay line 30 for generating second delay data signals for which the first delay data signals are delayed further for a fixed delay amount and a phase comparator 40 for comparing the transition of the second delay data signals with the phase of the clock signals. The phase comparator 40 controls the delay amount of the variable delay line 20 so as to make the transition of the second delay data signals be practically common-mode with the leading edge of the clock signals on condition that the pulse signals are supplied from the transition detector 10. The first delay data signals are outputted together with the clock signals.

Yoshikawa, Takefumi

JP26717198A

March 29, 2004

September 22, 1998

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MATSUSHITA ELECTRIC IND CO LTD

H03K3/037; H03K5/00; H03K5/13; H04L7/00; H04L7/02; (IPC1-7): H03K5/13; H03K3/037; H03K5/00

前田 弘

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