Title:
スパイキングニューラルネットワーク装置およびスパイキングニューラルネットワーク装置の学習方法
Document Type and Number:
Japanese Patent JP7383528
Kind Code:
B2
Abstract:
A spiking neural network device according to an embodiment includes a synaptic element, a neuron circuit, a determinator, a synaptic depressor, and a synaptic potentiator. The synaptic element has a variable weight and outputs, in response to input of a first spike signal, a synaptic signal having intensity adjusted in accordance with the weight. The neuron circuit outputs a second spike signal in a case where the synaptic signal is inputted and a predetermined firing condition for the synaptic signal is satisfied. The determinator determines whether or not the weight is to be updated on a basis of an output frequency of the second spike signal by the neuron circuit. The synaptic depressor performs depression operation for depressing the weight in a case where it is determined that the weight is to be updated. The synaptic potentiator performs potentiating operation for potentiating the weight.
Inventors:
Yoshifumi Nishi
Kumiko Nomura
Takao Marugame
Koichi Mizushima
Kumiko Nomura
Takao Marugame
Koichi Mizushima
Application Number:
JP2020035917A
Publication Date:
November 20, 2023
Filing Date:
March 03, 2020
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G06N3/08; G06G7/60; G06N3/063
Domestic Patent References:
| JP2013538396A | ||||
| JP2015501972A | ||||
| JP2301880A |
Foreign References:
| WO2019125419A1 | ||||
| CN106779059A |
Other References:
安達 琢ほか,メモリスタ-CMOSハイブリッド回路による非対称STDPシナプスデバイス,電子情報通信学会技術研究報告,日本,社団法人電子情報通信学会,2011年06月23日,Vol.111 No.106,pp.65-70
西 義史ほか,脳型ハードウエアにおけるオンライン学習に向けたシナプス重み更新規則の検討,第67回応用物理学会春季学術講演会[講演予稿集],日本,公益社団法人応用物理学会,2020年02月28日,18-021
西 義史ほか,脳型ハードウエアにおけるオンライン学習に向けたシナプス重み更新規則の検討,第67回応用物理学会春季学術講演会[講演予稿集],日本,公益社団法人応用物理学会,2020年02月28日,18-021
Attorney, Agent or Firm:
Sakai International Patent Office