PURPOSE: To reduce the burden in the status change discrimination of a data processing section and to decrease the discriminating time of changed data, by detecting the status change of data at each specific bit of all input data.

CONSTITUTION: Parallel input data I1∼In are inputted to an input data selector circuit 1, converted into a serial data with an output of an(n)-notation binary counter 12, and the existing data and a data one period before are logically compared at an exclusive OR circuit 7. If the data is changed, a flag F is outputted from RS flip-flop circuits 8 and 9 to a status change word detection circuit 13. The logical product between 2m-bit and an upper-order bit of the (n)-notation binary counter 12 is taken at the status change word detection circuit 13 to output only status change detection flags F1∼Fl corresponding to the input data group scanned at present. The flags F1∼Fl are detected at a data processing section 14. Thus, since the flag F of the status change is detected in m-bit of all the input data, the burden of the data processing section can be reduced to 1/m.