Title:
基板に集積した埋込み配線およびバイアのストレス解析および監視
Document Type and Number:
Japanese Patent JP2006519476
Kind Code:
A
Abstract:
Techniques and systems for applying analytical computations of stresses to layers with embedded line features to obtain stress information, to design microstructures, and to design and control fabrication processes.
Inventors:
Rosakis Ares J
Park Tesoon
Thresh Subra
Park Tesoon
Thresh Subra
Application Number:
JP2005518847A
Publication Date:
August 24, 2006
Filing Date:
January 27, 2004
Export Citation:
Assignee:
California Institute of Technology
International Classes:
H01L21/3205; B81C99/00; G01B9/02; G06F7/60; G06F17/10; G06F17/50; G06G7/48; G06G7/50; H01L21/00; H01L21/66; H01L21/768; H01L23/52; H05K3/00; H01L
Attorney, Agent or Firm:
Patent business corporation Prospec patent office