PURPOSE: To surely block unstable control information transmitted from the processor of another system, by setting a signal line at a high level by supplying electricity from the power source device of its own system when the power source device of the another system is removed.
CONSTITUTION: Abnormality signal setting circuits 202 and 212 which set abnormality signals S0 and S1 are respectively provided in power source devices 20 and 21. Moreover, a signal line 51 which transmits the abnormality signal S0 from the power source device 20 of System 0 to the processor 11 of System 1 is separated from another signal line 52 which transmits the abnormality signal S0 from the power source device 20 to the processor 10 of System 0, and a signal line 61 which transmits the abnormality signal S1 from the power source device 21 of System 1 to the processor 10 of System 0 is separated from another signal line 62 which transmits the abnormality signal S1 from the power source device 21 to the processor 11 of System 1. In addition, high- level potential V0 or V1 produced by means of power supply from the power source device 20 or 21 of own system is connected with the signal line 61 or 51 through a resistance 106 or 116 in the processors 10 and 11.
UEKI YOICHI
OSADA SATOSHI
| JPS5827218A | 1983-02-17 |