Title:
THIN FILM MEMORY TRANSISTOR AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH04334063
Kind Code:
A
Abstract:
PURPOSE: To obtain a thin film memory transistor and its manufacturing method wherein a tunnel oxide film can be easily formed which film can reduce the influence of a natural oxide film and scarcely generates the deterioration of withstand voltage at a step part.
CONSTITUTION: The title transistor is constituted by forming a gate electrode 12 on an insulative substrate 12, forming a silicon nitride film 13 on the gate electrode 12 directly or via the other insulating film, forming a silicon oxide thin film 15 on the silicon nitride film 13, and forming a semiconductor layer 16 having a source region S and a drain region D on the silicon oxide thin film 15.
Inventors:
ONAKA EIICHI
Application Number:
JP10435191A
Publication Date:
November 20, 1992
Filing Date:
May 09, 1991
Export Citation:
Assignee:
CASIO COMPUTER CO LTD
International Classes:
H01L21/318; H01L21/8247; H01L29/78; H01L29/786; H01L29/788; H01L29/792; (IPC1-7): H01L21/318; H01L29/784; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Takehiko Suzue
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