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Patent Searching and Data


Title:
COMPOUND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5921073
Kind Code:
A
Abstract:

PURPOSE: To enable to set at the desired optimum value the thickness and carrier density of a channel layer which determines the element characteristic of a Hall element, a Schottky gate FET, etc. by a method wherein a layer of high impurity density corresponding to the amount of surface charges forming surface levels is formed in the neighborhood of the surface of a III-V group compound such as GaAs.

CONSTITUTION: An N type GaAs channel layer 2 is formed on a semi-insulating GaAs substrate 1 by doping an impurity such as Si or Sn by vapor growing method. The carrier density and the thickness of the channel layer are contrived to become 1×1017cm-3 and 0.2μm respectively. An N type GaAs layer 4 of further higher impurity density is formed at the surface region on this N type GaAs channel layer 2. Either continuous formation or isolated formation at some intervals is available. The product (so-called nd product) of the carrier density and the thickness of this high density layer 4 is so controlled as to be coincident with the density of the surface levels of a GaAs semiconductor device.


Inventors:
TOMITA KOUJI
TAKAGI JIYUNKOU
INOUE TADAAKI
KANZAKI TAKESHI
Application Number:
JP13077982A
Publication Date:
February 02, 1984
Filing Date:
July 27, 1982
Export Citation:
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Assignee:
SHARP KK
International Classes:
H01L21/338; H01L29/80; H01L29/812; (IPC1-7): H01L21/20
Attorney, Agent or Firm:
Aoyama