Title:
【発明の名称】半導体デバイステスト装置
Document Type and Number:
Japanese Patent JP2691809
Kind Code:
B2
Abstract:
An easily reconfigurable DUT board interconnection grid is electrically and mechanically reliable, has low noise and cross-talk, and permits high density mixed digital and analog devices to be tested. This DUT board includes a grounding block of conductive material that has an inner and outer array of holes and is in electrical contact with the circuit board ground. The arrays of holes correspond in shape and size to, and are in electrical contact with, underlying inner and outer array of conductive members in the circuit board. Each conductive member provides a pin in the center of the corresponding hole to make each hole a coaxial contact receptacle. The inner array of conductive members connects to the sockets or pads that receive the device-under-test on the DUT side of the circuit board to the other side of the circuit board where the grounding block resides. The coaxial contact receptacles of the inner array therefore present an interface to the DUT. The individual conductive members in the outer array are connected to each of the tester signals that the operator may wish to connect to a DUT. The coaxial contact receptacles of the outer array therefore present an interface to the signals of the tester. Coaxial jumper wires are then used to connect selected locations in the inner and outer arrays.
More Like This:
Inventors:
Joseph A. Mielck
Application Number:
JP25577791A
Publication Date:
December 17, 1997
Filing Date:
September 07, 1991
Export Citation:
Assignee:
Tektronix Incorporated
International Classes:
G01R1/073; G01R31/28; H01L21/66; G01R31/26; (IPC1-7): G01R31/26; G01R31/28; H01L21/66
Domestic Patent References:
| JP4204392A | ||||
| JP63127169A | ||||
| JP63155629A | ||||
| JP425777A |
Attorney, Agent or Firm:
Masahiro Fukuyama