【発明の名称】検証用テスト回路生成装置

Japanese Patent JP2845744

B2

PURPOSE:To attain the observation of an input signal as well as a verification result by connecting a 2-way terminal to a signal generating circuit via a buffer element when a logic verification test circuit for an electronic circuit is generated so as to separate an input signal and an output signal of the two way terminal at verification. CONSTITUTION:A signal generating circuit generating section 141 generates signal generating circuit data 132 from input signal data 131 verifying an electronic circuit. A test circuit generating section 142 connects a 2-way terminal via a buffer element outputting an input signal based on the signal generating circuit data 132 and the electronic circuit data 133 to generate a test circuit data 134 to separate an input signal from an output signal and obtains the result of input and output from all terminals at verification.

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UBUKATA MASARU
KONDO SHUNSUKE

JP33241593A

January 13, 1999

December 27, 1993

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NIPPON DENKI KK
NIPPON DENKI TSUSHIN SHISUTEMU KK

G06F17/50; G01R31/28; (IPC1-7): G06F17/50; G01R31/28

Naoki Kyomoto (2 outside)

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