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Patent Searching and Data


Title:
TRANSISTOR OUTLINE HOUSING AND METHOD FOR PRODUCING THE SAME
Document Type and Number:
Japanese Patent JP2016103657
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide an excellent TO housing.SOLUTION: A TO housing includes a base that receives a device including a receiver diode or a transmitter diode. The device uses a plurality of bonding wires and is connected to connection lead wires. The connection lead wires pass through a passage of the base, are isolated from the base, and are secured in the base by a sealing compound. In order to reduce a length of each bonding wire, at least one of the connection lead wire has an enlarged cross section as compared to a cross section in the passage at a side of the device, is arranged asymmetrically in the passage, and is angled. The device protrudes into an area of the passage, and, in order to at least partially compensate for an increase in capacitance caused by the protrusion, the at least one connection lead wire has an excess length portion extending beyond the passage at a side of an electrical connection.SELECTED DRAWING: Figure 2

Inventors:
ROBERT HETTLER
KENNETH TAN
GEORG MITTERMEYER
KARSTEN DROEGEMUELLER
Application Number:
JP2016016990A
Publication Date:
June 02, 2016
Filing Date:
February 01, 2016
Export Citation:
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Assignee:
SCHOTT AG
International Classes:
H01L31/02; H01L23/02; H01S5/022
Domestic Patent References:
JPH05343117A1993-12-24
JPH0287559A1990-03-28
JP2007227724A2007-09-06
JP2011176021A2011-09-08
JP2007150182A2007-06-14
JP2005228766A2005-08-25
JP2008130834A2008-06-05
JP2007294660A2007-11-08
JP2009054982A2009-03-12
JP2012074645A2012-04-12
JP2001085568A2001-03-30
Foreign References:
US20060192221A12006-08-31
Attorney, Agent or Firm:
Okabe
Koji Yoshizawa