Title:
WEIGHTING CIRCUIT
Document Type and Number:
Japanese Patent JP3875075
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a weighting circuit capable of preventing a generation of an off-set current and thereby enhancing an accuracy of a current calculation.
SOLUTION: The weighting circuit is provided with an input current mirror circuit 3A; a plurality of output current mirror circuits 3B-3F provided in parallel; an abolishing current circuit 4 for abolishing an output current; and a series switch circuit for connecting/disconnecting output sides each other of the adjacent output current mirror circuit. When one of the series switches S1A-S1F is opened and the remained constitution switches S1A-S1F are closed, the output current from the output current mirror circuit connected to the abolishing current circuit 4 is abolished from an abolishing current circuit 4 by a wired OR making the opened constitution switches as a border. The output current from the output current mirror circuit connected to the output terminal is outputted from the output terminal 5 by the wired OR making the opened constitution switches as a border.
Inventors:
Kazuo Tsubouchi
Hiroyuki Nakase
Money
Shigeto Saegusa
Hiroyuki Nakase
Money
Shigeto Saegusa
Application Number:
JP2001346295A
Publication Date:
January 31, 2007
Filing Date:
November 12, 2001
Export Citation:
Assignee:
Clarion Co., Ltd.
International Classes:
G06G7/163; G06G7/19; H03F3/68; (IPC1-7): G06G7/19; H03F3/68
Domestic Patent References:
| JP11340760A | ||||
| JP2234504A |
Attorney, Agent or Firm:
Tamio Nishiwaki
Nishimura Kimiyoshi
Nishimura Kimiyoshi