Title:
WIRING BOARD, DISPLAY, SEMICONDUCTOR CHIP AND ELECTRONIC APPARATUS
Document Type and Number:
Japanese Patent JP3695307
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To prevent the corrosion of metal wirings of a wiring pattern made of a metal material having a low electric resistance.
SOLUTION: The wiring board has a plurality of metal wirings 14e on a board 7c. A guard wiring 29 made of a conductive oxide such as ITO, etc., is formed between at least a pair of adjacent metal wirings among the wirings 14e. When voltages V1-V4 (V1>V2>V3>V4) are applied to the wirings 14e, inserting the guard wiring 29 between the metal wirings 14e at the anode side and the metal wiring 14e at the cathode side prevents the wiring 14e at the anode side from corroding.
Inventors:
Arito Yasuto
Satoshi Yatabe
Endo Yang Wood Horse
Harada
Satoshi Yatabe
Endo Yang Wood Horse
Harada
Application Number:
JP2000326073A
Publication Date:
September 14, 2005
Filing Date:
October 25, 2000
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
H05K3/22; G02F1/1345; G09F9/00; G09F9/30; H01L23/12; H01L27/32; H05K1/02; H05K1/09; H05K1/03; (IPC1-7): H05K1/02; G02F1/1345; G09F9/00; G09F9/30; H01L23/12; H05K1/09
Domestic Patent References:
| JP2000252597A | ||||
| JP10215039A | ||||
| JP2000221537A | ||||
| JP2000294897A |
Attorney, Agent or Firm:
Masahiko Ueyanagi
Osamu Suzawa
Osamu Suzawa
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