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Title:
DEBUG CONTROL CIRCUIT AND DEBUG CONTROL METHOD
Document Type and Number:
Japanese Patent JP2016177564
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a debug control circuit capable of improving the utilization efficiency of a memory without leaving undesired signals in a memory in debugging operation.SOLUTION: The debug control circuit for acquiring signals for debugging, which includes: a memory that stores signals used for observation; a signal selection section that selects a signal used for determining whether or not a cancellation should be made; a trigger detection section that detects a trigger for canceling from signals selected by the signal selection section; and a memory control unit that controls to discard the stored signal which is used for observation from the memory using the trigger detected by the trigger detection section.SELECTED DRAWING: Figure 1

Inventors:
KOJIMA TERUHISA
Application Number:
JP2015057534A
Publication Date:
October 06, 2016
Filing Date:
March 20, 2015
Export Citation:
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Assignee:
NEC PLATFORMS LTD
International Classes:
G06F11/28
Domestic Patent References:
JPH11219293A1999-08-10
JP2002175198A2002-06-21
JP2012098979A2012-05-24
JPH11219293A1999-08-10
JPH08263328A1996-10-11
JP2000112783A2000-04-21
JP2014142820A2014-08-07
JP2002175198A2002-06-21
JP2012098979A2012-05-24
Other References:
早川真也: "すべてのコマンドを知ることから始まる Vim熟練者への道", SOFTWAREDESIGN, vol. 第261号, JPN6017017089, 18 July 2012 (2012-07-18), JP, pages 28 - 34
早川真也: "すべてのコマンドを知ることから始まる Vim熟練者への道", SOFTWAREDESIGN, vol. 第261号, JPN6017017089, 18 July 2012 (2012-07-18), JP, pages 28 - 34
Attorney, Agent or Firm:
Masahiko Desk
Naoki Shimosaka