Title:
INTEGRAL INTERLOCKING DEVICE AND INTEGRAL INTERLOCKING SYSTEM
Document Type and Number:
Japanese Patent JP2016097936
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To realize an integral interlocking device 10 capable of flexibly coping with abnormality in a partial station, even if centralized treatment is executed on interlocking logic over a plurality of stations in a line section of a management object.SOLUTION: An integral interlocking device comprises a blocking-up logical processing means 12 between next stations (A-B,B-C,...) for processing blocking-up logic on a plurality of single track sections with respective sections, besides respective station individual interlocking logical processing means 11 for processing interlocking logic of the respective stations A,B,C,..., and also comprises blocking-up logical processing means 13 between near stations (A-C,...) with an intermediate station and both-side single track section as one section, a virtual track circuit logical processing means 14 between the next stations (A-B,B-C,...), a virtual track circuit logical processing means 15 between the near stations (A-C,...) and next station-near station switching means 16 for properly using next station means (12,14) and near station means,(13,15) in response to the existence of abnormality, and train on-rail state grasping and blocking-up logic on single track sections (A6RT,B6RT,C6RT,...) in an object line section, are processed with respective sections (A6RT, an extension A6RT,B6RT and an extension B6RT,C6RT,...).SELECTED DRAWING: Figure 1
Inventors:
HARIMA YOSHINORI
FURUKAWA SHINICHI
FURUKAWA SHINICHI
Application Number:
JP2014239067A
Publication Date:
May 30, 2016
Filing Date:
November 26, 2014
Export Citation:
Assignee:
DAIDO SIGNAL CO LTD
International Classes:
B61L23/30
Domestic Patent References:
| JP2010215148A | 2010-09-30 | |||
| JPS5429410A | 1979-03-05 | |||
| JPH10264816A | 1998-10-06 |
Attorney, Agent or Firm:
Kaori Sato