Title:
信頼性の改善のためにEEPROMの消去中に減じられた一定の電界を提供するための方法
Document Type and Number:
Japanese Patent JP4641697
Kind Code:
B2
Abstract:
A method to reduce the peak electric field during erase of a memory device composed of multiple memory cells. The electric field Efield of the memory cell during erase is determined by the equation Efield SIMILAR ag(Vgate - Vth) + Vtuv + (as -1)Vsource and varying gate voltages Vgate are applied to the gate of the cell being erased so that the Vgate - Vth is constant during the erase procedure.
Inventors:
Cleveland lee
Application Number:
JP2001545318A
Publication Date:
March 02, 2011
Filing Date:
December 05, 2000
Export Citation:
Assignee:
Spansion LLC
International Classes:
G11C16/02; G11C16/14; H01L21/8247; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP10261292A | ||||
| JP11007785A | ||||
| JP11297088A | ||||
| JP8031963A |
Foreign References:
| US5485423 | ||||
| US5978277 |
Attorney, Agent or Firm:
Kuro Fukami
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai
Nobuo Arakawa
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai
Nobuo Arakawa