SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR DRIVING THE SAME

Japanese Patent JP2016126811

A

PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of reducing power consumption, and further to provide a method for driving the same.SOLUTION: A semiconductor memory device comprises first and second TFETs in which gates and drains are cross-connected. The drain of the first TFET is connected to a first node, and the drain of the second TFET is connected to a second node. The semiconductor memory device further includes: a first access transistor connecting the first node to a first write bit line; a second access transistor connecting the second node to a second write bit line; and a third access transistor connecting the first node to a first read bit line. The first access transistor is composed of a TFET connected so that current flows from the first node to the first write bit when it enters an on-state. The second access transistor is composed of a TFET connected so that current flows from the second node to the second write bit line when it enters an on-state.SELECTED DRAWING: Figure 1

MIYANO SHINJI

JP2015001459A

July 11, 2016

January 07, 2015

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TOSHIBA CORP

G11C11/412; G11C11/413

Sakai International Patent Office

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